Modeling and Synthesis of Computational Efficient Adaptive Neuro-Fuzzy Systems Based on Matlab
ICANN '08 Proceedings of the 18th international conference on Artificial Neural Networks, Part II
A modified gradient-based neuro-fuzzy learning algorithm and its convergence
Information Sciences: an International Journal
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Journal of Intelligent and Robotic Systems
Defuzzification block: New algorithms, and efficient hardware and software implementation issues
Engineering Applications of Artificial Intelligence
Hi-index | 0.00 |
This paper describes the development of efficient hardware/software (HW/SW) neuro-fuzzy systems. The model used in this work consists of an adaptive neuro-fuzzy inference system modified for efficient HW/SW implementation. The design of two different on-chip approaches are presented: a high-performance parallel architecture for offline training and a pipelined architecture suitable for online parameter adaptation. Details of important aspects concerning the design of HW/SW solutions are given. The proposed architectures have been implemented using a system-on-a-programmable-chip. The device contains an embedded-processor core and a large field programmable gate array (FPGA). The processor provides flexibility and high precision to implement the learning algorithms, while the FPGA allows the development of high-speed inference architectures for real-time embedded applications.