Brief paper: An efficient controller structure with minimum roundoff noise gain
Automatica (Journal of IFAC)
| Hi-index | 22.15 |
When a digital computer acts as the compensating element of a sampled-data feedback system, the system's performance is degenerated by the computational errors inherent in the finite word-length machine. The analysis presented in this paper enables the maximum increase in system error due to computer round-off errors to be assessed for a closed-loop linear sampled-data system. In fact, the loss in overall performance can be determined by a slide-rule calculation for all computer word-lengths. One application of the analysis is to specify the precision required in the digital compensator and peripheral equipment for consistency with the overall accuracy demanded of the closed loop system. It also enables the selection of the programming technique requiring the shortest computer word-length for this accuracy. As a means of verifying the analysis, the performance of two different digital compensators for a practical system are each compared with a counterpart having negligible round-off errors.