Research: Specification, validation, and verification of time-critical systems

  • Authors:
  • Shiuh-Pyng Shieh;Jun-Nan Chen

  • Affiliations:
  • Department of Computer Science and Information Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan;Department of Computer Science and Information Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan

  • Venue:
  • Computer Communications
  • Year:
  • 1998

Quantified Score

Hi-index 0.24

Visualization

Abstract

In this paper, we propose a new formalism, named the Timed Communicating Finite State Machine (Timed CFSM), for specifying and verifying time-critical systems. Timed CFSM preserves the advantages of CFSM, such as the ability to express communication, synchronization and concurrency in computer systems. A given time-dependent specification can be formalized as a Timed CFSM, from which the reachability graph is constructed to verify the correctness of the specification. To cope with the space explosion problem from which all reachability analysis methods suffer, we propose a space reduction algorithm to meet the space constraint of the verification environment.