Research: Performance and bandwidth balancing of the register insertion bus (RIB) fiber optic network

  • Authors:
  • James M. Ott;Anura P. Jayasumana

  • Affiliations:
  • Hewlett-Packard Company, 3404 East Harmony Road, Fort Collins, CO 80525, USA;Department of Electrical Engineering, Colorado State University, Fort Collins, CO 80523, USA

  • Venue:
  • Computer Communications
  • Year:
  • 1997

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Abstract

Register insertion bus (RIB) is a high-speed network that uses a folded-bus topology and a medium access interface similar to that used in the register insertion ring. A detailed analysis of the packet delay for the RIB network is presented. The analysis results are demonstrated and shown to accurately match RIB simulation results. Performance analysis demonstrates that fair network access is achieved at normal loads, but upstream stations are favored for high loads. Thus, extensions to the RIB access scheme to provide a fair distributed access scheme is presented. Results presented show this bandwidth balancing technique to provide a fair access to the network for all loads.