Design of High-Rate Serially Concatenated Codes with Low Error Floor
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Capacity-approaching irregular turbo codes for the binary erasure channel
IEEE Transactions on Communications
| Hi-index | 754.84 |
In this correspondence, we present an interleaving scheme that yields quasi-cyclic turbo codes. We prove that randomly chosen members of this family yield with probability almost 1 turbo codes with asymptotically optimum minimum distance, i.e., growing as a logarithm of the interleaver size. These interleavers are also very practical in terms of memory requirements and their decoding error probabilities for small block lengths compare favorably with previous interleaving schemes.