An FPGA receiver for CPSK spread spectrum signaling

Authors:
S. K.S. Chan;V. C.M. Leung
Affiliations:
Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC;-
Venue:
IEEE Transactions on Consumer Electronics
Year:
1999

Citing 0
Cited 3

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Abstract

In this paper, we present the design, implementation and testing of an M-ary direct sequence spread spectrum receiver suitable for wireless home networking applications. The receiver employs a novel code-phase-shift keying (CPSK) signaling scheme, in which each of the M signaling waveforms is derived from a different phase shift of a single pseudonoise code sequence. The receiver consists of an IF demodulator and a CPSK baseband decoder, implemented using discrete components and an FPGA (field programmable gate array) chip, respectively. A modified double-dwell serial search scheme is used for code acquisition and tracking, and the carrier-phase synchronization is solved by a Costas loop in the IF demodulator and a double threshold detection scheme in the CPSK decoder. Measurements of receiver performance are presented and compared with theoretical calculations