A General-Purpose FPGA-Based Reconfigurable Platform for Video and Image Processing
ISNN 2009 Proceedings of the 6th International Symposium on Neural Networks: Advances in Neural Networks - Part III
A TV image expander for the deaf
Proceedings of the 2nd International Convention on Rehabilitation Engineering & Assistive Technology
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A low cost TV set top box capable of expanding sign images and decoding closed caption data is described. Its internal architecture mainly consists of video decoder/encoder, 256 Kbytes of video memories, an infrared receiver and an FPGA based video processing unit. The FPGA implements a 27 MHz 8 bits microcontroller, an image expander, an on screen display unit, a 12C interface plus other control logic. The image expander uses a fixed 2×2 bilinear interpolation coupled with a nearest neighborhood input selection to simplify the hardware that allows 9 image scaling factors ranging from 1×1 to 2×2. The sign image that can be expanded is of the maximum size of 128×128 pixels or approximately 1/25 of the entire TV screen. This video processing unit can also decode both Thai and English caption codes inserted in the vertical blanking interval of the incoming composite video signal and display their Thai-English colored fonts in 32×16 dot matrix forms.