A 10-bit DAC with offset-adjustable op-amp for LCD column driver applications
Analog Integrated Circuits and Signal Processing
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A high-speed low-power source driver using a new rail-to-rail scheme is proposed, designed and evaluated for large TFT LCD applications. The proposed output driver is composed of a differential amplifier stage, second amplifier stage, driver selector, dual push-pull output driver stages for rail-to-rail output driving and feedback path selector. The output driver amplifier achieves a very large driving capability by eliminating the of the output switches used for polarity control. This increases the output driving speed while retaining low quiescent current consumption and can minimize the area of the output driving transistors and switches used for output polarity inversion. The fabricated 8-bit source driver implemented in 0.3 mum 18 V high voltage CMOS technology demonstrates that the driver exhibits maximum settling times of 8.1 mus and 8.3 ns for the rising and falling edges with dot inversion under a 10-kohm/300-pF panel load. The quiescent current consumptions for the PMOS input driver and NMOS input driver are 10 muA/channel on average. The values of the differential nonlinearity (DNL) and integral nonlinearity (INL) are less than +/-0.5 LSB.