Analog filter pair design on the basis of a gyrator–capacitor prototype circuit

Authors:
Andrzej Handkiewicz;Piotr Katarzyński;Szymon Szczȩsny;Jarosław Wencel;Paweł Śniatała
Affiliations:
Chair of Computer Engineering, Poznań University of Technology, Poland;Chair of Computer Engineering, Poznań University of Technology, Poland;Chair of Computer Engineering, Poznań University of Technology, Poland;Chair of Computer Engineering, Poznań University of Technology, Poland;Chair of Computer Engineering, Poznań University of Technology, Poland
Venue:
International Journal of Circuit Theory and Applications
Year:
2012

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Abstract

The paper presents an algorithmic approach to a low-sensitivity design strategy for analog filter pairs based on a gyrator–capacitor prototype circuit. The general structure of the prototype circuit is proposed. It assumed that the generic structure of the prototype circuit can evolve, with the use of additional gyrators, into a circuit with increased redundancy. It is shown that symbolic analysis of the prototype circuit, used to formulate a set of nonlinear algebraic equations, is necessary to achieve a sufficiently high algorithm operation speed. To find a solution to this specific system of nonlinear algebraic equations, different numerical methods are compared. The modified Hooke and Jeeves algorithm is found to be the most effective. The elaborated algorithms and programs are illustrated with the seventh-order filter pair example. The obtained filter is better than the filter obtained using LC ladder structures with respect to chip area and power consumption, and these improvements are obtained without loss of sensitivity properties. Copyright © 2010 John Wiley & Sons, Ltd.