A scalable parallel internet router that enables the QoS through merging ATM with IPv6

  • Authors:
  • Shaowen Song

  • Affiliations:
  • Department of Physics and Computing, Wilfrid Laurier University, Waterloo, Ont., Canada N2L 3C5

  • Venue:
  • Computer Communications
  • Year:
  • 2002

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Abstract

This paper presents a parallel Internet router that supports the integration of the ATM (Asynchronous Transfer Mode) and IPv6. The hardware architecture and the software algorithms of the parallel router are discussed. The key concept of the proposed parallel hardware is to have one routing node to be responsible for one network link to achieve a high packet switching speed. The packets are switched through the communications among the routing nodes. Each routing node is constructed by a general-purpose computer plus an inter-node communication unit (ICU), and an intelligent network interface. The ICU developed in this work segregates realtime and non-realtime packets to support the ATM/IP integration. The ICU also self-manages the buffer memory address accesses and the burst packets produced by the variable rate realtime communications to reduce the CPU workload and in return to increase the switching bandwidth. An ATM-cell/IPv6-packet co-switching/routing mechanism has been developed for the router control software based on the hardware architecture of the proposed parallel router.