Parallel algorithms for data compression
Journal of the ACM (JACM)
ACM Computing Surveys (CSUR)
Systolic implementations of a move-to-front text compressor
SPAA '89 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures
Text compression
A parallel architecture for high-speed data compression
Journal of Parallel and Distributed Computing
Practical dictionary management for hardware data compression
Communications of the ACM
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Systolic array architectures for self-organizing linear lists under the transpose update heuristic are presented. The first model has linear delay and restricts input on every other system cycle. The second system combines a systolic array with trees to provide logarithmic delay and input on every clock cycle. These preliminary designs can be the basis of hardware used to achieve high-speed lossless data compression for data communication and storage. On large files (greater than 40 kilobytes), our designs provide better compression than other systolic list compression schemes