An implementation for ATM Adaptation Layer 5

  • Authors:
  • M.S Obaidat;V Cassod

  • Affiliations:
  • Department of Computer Science, Monmouth University, West Long Branch, NJ 07764, USA;Department of Computer Science, Monmouth University, West Long Branch, NJ 07764, USA

  • Venue:
  • Computer Communications
  • Year:
  • 2002

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Abstract

IP over ATM technique is gaining popularity due to the Quality of Service (QoS) and other management features offered by ATM and its ease of integration with almost all existing technologies. This paper deals with the granularity of implementation of ATM Adaptation Layer 5 (AAL 5) protocol stack. The focus of this study is to propose an AAL 5 implementation that would outperform the existing implementation schemes. This paper also makes an effort to analyze the performance of the proposed implementation and validate the simulation results using analytic modeling. We also experimented with the simulation model to find out the best range of packet size and burst size for the AAL 5 stack. It was found that in order to achieve a good performance, the minimum recommended packet size should be 0.5KB. This is a reasonable packet size for IP over ATM. We can have higher packet sizes in order to obtain better efficiency, however, this may cause for problems with memory requirements. Therefore, the upper limit to packet size for efficient and practical implementation should be 10KB. Finally, it is very important on the segmentation side for the memory to be of fixed latency. If the Segmentation and Reassembly (SAR) interface to memory is not of fixed latency, further cycle loss could be introduced.