IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 1)
Improved queueing analysis of shared buffer switching networks
IEEE/ACM Transactions on Networking (TON)
Large-scale ATM multistage switching network with shared buffer memory switches
IEEE Communications Magazine
Performance of shared-memory switches under multicast bursty traffic
IEEE Journal on Selected Areas in Communications
IEEE Journal on Selected Areas in Communications
Performance Analysis of a Packet Switch Based on Single-Buffered Banyan Network
IEEE Journal on Selected Areas in Communications
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Asynchronous transfer mode (ATM) switches based on shared buffering are known to have better performance and buffer utilization than input or output queued switches. Shared buffer switches do not suffer from head of line blocking which is a problem in simple input buffering. Shared buffer switches have previously been studied under uniform and unbalanced traffic patterns. However, due to the complexity of the model, the performance of such a switch, in the presence of a single hot spot, has not been fully explored. In this article, we develop a model for a multistage ATM switch constructed of shared buffer switching elements and operating under a hot spot traffic pattern. The model is used to study the switch performance in terms of the throughput, cell delay, cell loss probability and the optimal buffer size.