Using statecharts for hardware description and synthesis

• Authors: D. Drusinsky;D. Harel
• Venue: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• Year: 2006

Statecharts have been proposed recently as a visual formalism for the behavioral description of complex systems. They extend classical state diagrams in several ways, while retaining their formality and visual nature. The authors argue that statecharts can be beneficially used as a behavioral hardware description language. They illustrate some of the main features of the approach, including: hierarchical decomposition, multilevel timing specifications and flexible concurrency and synchronization capabilities. The authors also present a VLSI synthesis methodology by which layer area and delay periods can be reduced relative to the conventional finite-state-machine (FSM) synthesis method