Functionally partitioned module-based programmable architecture for wireless base-band processing
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
A BIST TPG for low power dissipation and high fault coverage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Correlation-based rectangular encoding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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In this paper, we introduce a hierarchical test set structure called star test, derived from the experimental observation of the fault clustering phenomena. Based on the concept of star test, two applications are studied: one applied to built-in-self-test (BIST); the other to automatic test pattern generation (ATPG). First, a very high quality and low-cost BIST scheme, named STAR-BIST is proposed. Experimental results have demonstrated that a very high fault coverage can be obtained without any modification of the logic under test, no test data to store and very simple BIST hardware which does not depend on the size of the circuit. Second, an efficient test generator, named STAR-ATPG, is developed which speeds up the ATPG performance by a factor of up to five for large industrial circuits