A state assignment procedure for single-block implementation of state charts

  • Authors:
  • D. Drusinsky-Yoresh

  • Affiliations:
  • Sony Corp., Kanagawa

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2006

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Abstract

The authors presents a simple, single-block implementation scheme for state charts which uses a single conventional combinational-logic block and a state register. The most attractive feature of the proposed scheme is the absence of communication. It eliminates the need for communicating FSMs (finite state machines) owing to an older realization method, and does so without having to account for all state configurations implied by concurrency. The author investigates the state encoding conditions for the implementation and suggests an appropriate optimization technique