Generic sub-space algorithm for generating reduced order models of linear time varying vlsi circuits
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Incremental and on-demand random walk for iterative power distribution network analysis
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A fast symbolic computation approach to statistical analysis of mesh networks with multiple sources
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Model order reduction via eigen decomposition analysis
International Journal of Computer Applications in Technology
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Symbolic model order reduction (SMOR) is a macromodeling technique that generates reduced-order models while retaining the parameters in the original models. Such symbolic reduced-order models can be repeatedly simulated with a greater efficiency for varying model parameters. Although the model-order-reduction concept has been extensively developed in literature and widely applied in a variety of problems, model order reduction from a symbolic perspective has not been well studied. Several methods developed in this paper include symbol isolation, nominal projection, and first-order approximation. These methods can be applied to models having only a few parametric elements and to models having many symbolic elements. Of special practical interest are models that have slightly varying parameters such as process related variations, for which efficient reduction procedures can be developed. Each technique proposed in this paper has been tested by circuit examples. Experiments show that the proposed methods are efficient and effective for many circuit problems