Slack in static timing analysis

  • Authors:
  • J. Vygen

  • Affiliations:
  • Res. Inst. for Discrete Math., Univ. of Bonn

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2006

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Abstract

The notion of slack is central in static timing analysis and very large scale integration (VLSI) design in general. Negative slack means that a timing constraint is violated, while a positive slack of x ps is intended to mean that an extra delay of x ps (or a smaller delay by x ps in early mode) could be tolerated. However, this property does not hold with the standard static timing analysis model. The paper defines slack properly, shows how to compute it efficiently, and proves that it has the intended properties. The proposed idea is based on enhanced slew propagation