Multiprocessor performance estimation using hybrid simulation
Proceedings of the 45th annual Design Automation Conference
A resource-awareness information extraction architecture on mobile grid environment
Journal of Network and Computer Applications
A flexible hybrid simulation platform targeting multiple configurable processors SoC
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Synchronization for hybrid MPSoC full-system simulation
Proceedings of the 49th Annual Design Automation Conference
Hybrid simulation for extensible processor cores
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Automatic generation of functional models for embedded processor extensions
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Software energy estimation is a critical step in the design of energy-efficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slow for iterative use in system-level exploration and for embedded systems with high software complexity. In this paper, we propose a methodology called hybrid simulation, which combines instruction set simulation with selective native execution (execution of some parts of the program directly on the simulation host computer). Hybrid simulation attempts to overcome the disadvantages of instruction-level simulation (low speed) and pure native execution (estimation accuracy and inapplicability to target-dependent code) while exploiting their advantages. In order to perform the energy estimation for natively executed subprograms, hybrid simulation leverages previously developed techniques for software energy macromodeling. This paper identifies and addresses the main challenges involved in hybrid simulation, including control/data transfer and memory synchronization between instruction set simulation and native execution domains, estimation errors due to macromodeling, and simulation overheads for switching between domains. We present an automatic tool flow for hybrid simulation, which analyzes a given program and selects functions for native execution in order to achieve maximum estimation efficiency while limiting estimation error. Our tool generates native ldquodrop-inrdquo modules that are linked into the instruction set simulator (ISS) and simulation ldquostubsrdquo that are linked with the application to facilitate hybrid simulation. We have applied the proposed hybrid simulation methodology to a variety of embedded software programs, resulting in average speedups of 25.2x (maximum of 124) and estimation error of only 3% (maximum of 6%), as compared to one of the fastest publicly available ISSs.