Brief announcement: efficient cache oblivious algorithms for randomized divide-and-conquer on the multicore model

  • Authors:
  • Neeraj Sharma;Sandeep Sen

  • Affiliations:
  • Mentor Graphics (INDIA) Pvt. Ltd., Noida, UP, India;Indian Institute of Technology, Delhi, New Delhi, India

  • Venue:
  • Proceedings of the twenty-fourth annual ACM symposium on Parallelism in algorithms and architectures
  • Year:
  • 2012

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Abstract

In this paper we present a cache-oblivious framework for randomized divide and conquer algorithms on the multicore model with private cache. We first derive an O(n/p log n + log n log log n) expected parallel depth algorithm for sorting n numbers with expected O(n/B logM n) cache misses where p,M and B respectively denote the number of processors, the size of an individual cache memory and the block size respectively. Although similar results have been obtained recently for sorting, we feel that our approach is simpler and general and we apply it to obtain an algorithm for 3D convex hulls with similar bounds. We also present a simple randomized processor allocation technique without the explicit knowledge of the number of processors that is likely to find additional applications in resource oblivious environments.