On the architecture and performance of a hybrid image rejection receiver

  • Authors:
  • Chun-Chyuan Chen;Chia-Chi Huang

  • Affiliations:
  • Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu;-

  • Venue:
  • IEEE Journal on Selected Areas in Communications
  • Year:
  • 2006

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Abstract

This paper describes a hybrid image rejection receiver. The hybrid image rejection receiver contains a modified Hartley (1928) image rejection mixer and a digital image rejection processor. The modified Hartley image rejection mixer performs similarly to an original Hartley image rejection receiver but provides two digital outputs. In one output it enhances the desired signal and in the other output it enhances the image signal. The digital image rejection processor first measures the mismatching effect in the analog devices and then suppresses the image signal by compensating for the mismatching effect. We also propose a simplified implementation method for the hybrid image rejection receiver to reduce its computation complexity. Computer simulation was used to evaluate the performance of this simplified implementation method to include the quantization effect introduced by the A/D converters. Simulation results show that the proposed hybrid image rejection receiver achieves much better performance than the original Hartley image rejection receiver. This architecture greatly relaxes the matching requirements of the analog devices and has a low complexity for an IC implementation