Future applicability of bus-based shared memory multiprocessors
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
Improving End System Performance for Multimedia Applicationsover High Bandwidth Networks
Multimedia Tools and Applications
Distributed Video Production: Tasks, Architecture and QoS Provisioning
Multimedia Tools and Applications
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No aspect of computer design is sacred, not even the system bus, which is giving way to switches in multiprocessing systems, where performance is key. System buses, which string computers together out of circuit boards, have come to strangle system performance in many cases. Another interconnection architecture, though, can free a system from the bus's clutch. Variously known as a switch, crossbar, or crosspoint, it has long been used in speciality computers and is now making its way into lower-cost machines. Meanwhile, silicon and packaging technology have been refined to the point that the crossbar architecture can vie with the system bus for a place in low-cost multiprocessors. More specifically, the crossbar is well suited to use in distributed memory systems, where there is a need for broad path ways for communications between the chunks of memory themselves. The roots of such an approach go deep. In fact, it may be said to have started with an idea for keeping as much data traffic as possible out of general circulation: cache memory