Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip

Authors:
Phi-Hung Pham;Jongsun Park;Phuong Mau;Chulwoo Kim
Affiliations:
Department of Electronics and Electrical Engineering, Korea University, Seoul, South Korea;Department of Electronics and Electrical Engineering, Korea University, Seoul, South Korea;Department of Electronics and Electrical Engineering, Korea University, Seoul, South Korea;Department of Electronics and Electrical Engineering, Korea University, Seoul, South Korea
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2012

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Abstract

It is a challenging task in a network-on-chip to design an on-chip switch/router to dynamically support (hard) guaranteed throughput under very tight on-chip constraints of power, timing, area, and time-to-market. This paper presents the design and implementation of a novel pipeline circuit-switched switch to support guaranteed throughput. The proposed circuit-switched switch, based on a backtracking probing path setup, operates with a source-synchronous wave-pipeline approach. The switch can support a dead- and live-lock free dynamic path-setup scheme and can achieve high bandwidth and high area and energy efficiency. A silicon-proven prototype of a 16-bit-data 5-bidirectional-port switch in a four-metal-layer 0.18-$\mu$ m CMOS standard-cell technology can yield an aggregate data bandwidth of up to 73.84 Gb/s, while occupying only a modest area of 0.0315 mm$^{2}$. The synthesizable implementation of the proposed switch also results in a cost-effective design, fast development time, and portability.