A framework for optimizing GCC for ARM architecture

• Authors: P. R. Mahalingam;Shimmi Asokan
• Venue: Proceedings of the International Conference on Advances in Computing, Communications and Informatics
• Year: 2012

Mobile application domain is developing on a daily basis. The performance, features and aesthetics of the applications play an important role in its increasing importance. Also, upcoming device models are looking for more energy-efficient performance as a step towards green computing. This is realized by ARM cores. But the performance and energy efficiency depend not only on the core, but the application also. Such efficiency can only be managed by efficient code from the compiler. This is primarily managed in its back-end, which comprises of the latter half of the compiler's control flow (intermediate code generator to code generator). If the code is optimized by the compiler, it will perform with lesser CPU cycle requirements, and save more energy. So, optimizing the code saves both time and power. In order to do so, compilers like GCC already provide a lot of options. But due to the generic structure of GCC, it performs very little ARM-specific optimizations. Here, we aim to improve the performance of the GCC optimizers for the ARM cores by better instruction selection (machine idioms and instruction combining), and choosing the order of optimizations appropriately, since in some cases, a set of optimizations may pave the way for improving some others. The end result is targeted to give about 30% increase in efficiency in most cases.