Hardware/Software CO-Design for Data Flow Dominated Embedded Systems
Hardware/Software CO-Design for Data Flow Dominated Embedded Systems
Hardware/software codesign for signal processing systems. A survey and new results
ASILOMAR '95 Proceedings of the 29th Asilomar Conference on Signals, Systems and Computers (2-Volume Set)
Algorithm/Architecture Co-Design of 3-D Spatio–Temporal Motion Estimation for Video Coding
IEEE Transactions on Multimedia
Efficient Motion Re-Estimation With Rate-Distortion Optimization for MPEG-2 to H.264/AVC Transcoding
IEEE Transactions on Circuits and Systems for Video Technology
An Efficient VLSI Architecture for Transform-Based Intra Prediction in H.264/AVC
IEEE Transactions on Circuits and Systems for Video Technology
Fast Decision of Block Size, Prediction Mode, and Intra Block for H.264 Intra Prediction
IEEE Transactions on Circuits and Systems for Video Technology
High Efficiency Architecture Design of Real-Time QFHD for H.264/AVC Fast Block Motion Estimation
IEEE Transactions on Circuits and Systems for Video Technology
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H.264/AVC is a Video Compression Standard and one of the main objectives is to improve compression ratio for real time Multimedia application. Compared with other standards such as MPEG-2 and MPEG-4 Visual, H.264 can deliver better image quality at the same compressed bit rate or at a lower bit rate. And it is necessary to ensure a better tradeoff between computation complexity and picture quality for resource constrained embedded platforms. Motion Estimation is the most time consuming process whose performance is been evaluated using metrics such as Sum of Absolute Differences (SAD), Sum of Squared Differences (SSD) and Mean Absolute Difference (MAD). The Simulation of Motion Estimation is done using MATLAB for different metrics and compression ratio is been analyzed.