Uniqueness of the Gaussian Kernel for Scale-Space Filtering
IEEE Transactions on Pattern Analysis and Machine Intelligence
A regularized solution to edge detection
Journal of Complexity
Analog VLSI and neural systems
Analog VLSI and neural systems
Computer Vision, Graphics, and Image Processing
A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Object Class Recognition and Localization Using Sparse Features with Limited Receptive Fields
International Journal of Computer Vision
The effect of mismatch in current- versus voltage-mode resistive grids
International Journal of Circuit Theory and Applications
On the implementation of linear diffusion in transconductance-based cellular nonlinear networks
International Journal of Circuit Theory and Applications - CNNA part II
Analog VLSI circuits as physical structures for perception in early visual tasks
IEEE Transactions on Neural Networks
Hi-index | 0.00 |
This paper addresses the design and VLSI implementation of MOS-based RC networks capable of performing time-controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS transistor biased in the ohmic region. The design of this elementary transistor is carefully realized according to the value of the ideal resistor to be emulated. For a prescribed signal range, the MOSFET in triode region delivers an interval of instantaneous resistance values. We demonstrate that, for the elementary 2-node network, establishing the design equation at a particular point within this interval guarantees minimum error. This equation is then corroborated for networks of arbitrary size by analyzing them from a stochastic point of view. Following the design methodology proposed, the error committed by an MOS-based grid when compared with its equivalent ideal RC network is, despite the intrinsic nonlinearities of the transistors, below 1% even under mismatch conditions of 10%. In terms of image processing, this error hardly affects the outcome, which is perceptually equivalent to that of the ideal network. These results, extracted from simulation, are verified in a prototype vision chip with QCIF resolution manufactured in the AMS 0.35µm CMOS-OPTO process. This prototype incorporates a focal-plane MOS-based RC network that performs fully programmable Gaussian filtering. Copyright © 2011 John Wiley & Sons, Ltd.