Explaining the gap between theoretical peak performance and real performance for supercomputer architectures

  • Authors:
  • W. Schönauer;H. Häfner

  • Affiliations:
  • -;-

  • Venue:
  • Scientific Programming
  • Year:
  • 1994

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Abstract

The basic architectures of vector and parallel computers and theirproperties are presented followed by a discussion of memory sizeand arithmetic operations in the context of memory bandwidth. For asingle operation micromeasurements of the vector triad for the IBM3090 VF and the CRAY Y-MP/8 are presented, revealing in detail thelosses for this operation. The global performance of a wholesupercomputer is then considered by identifying reduction factorsthat reduce the theoretical peak performance to the poor realperformance. The responsibilities of the manufacturer and of theuser for these losses are discussed. The price-performance ratiofor different architectures as of January 1991 is brieflymentioned. Finally a user-friendly architecture for a supercomputeris proposed.