A framework for accelerating neuromorphic-vision algorithms on FPGAs

  • Authors:

  • M. DeBole;A. Al Maashri;M. Cotter;C-L. Yu;C. Chakrabarti;V. Narayanan

  • Affiliations:

  • Dept. of CSE, The Pennsylvania State University, University Park, PA 16802, USA;Dept. of CSE, The Pennsylvania State University, University Park, PA 16802, USA;Dept. of CSE, The Pennsylvania State University, University Park, PA 16802, USA;School of ECEE, Arizona State University Tempe, AZ 85287, USA;School of ECEE, Arizona State University Tempe, AZ 85287, USA;School of ECEE, Arizona State University Tempe, AZ 85287, USA

  • Venue:
  • ICCAD '11 Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design
  • Year:
  • 2011

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Abstract

Implementations of neuromorphic algorithms are traditionally implemented on platforms which consume significant power, falling short of their biologically underpinnings. Recent improvements in FPGA technology have led to FPGAs becoming a platform in which these rapidly evolving algorithms can be implemented. Unfortunately, implementing designs on FPGAs still prove challenging for nonexperts, limiting their use in the neuroscience domain. In this paper, a FPGA framework is presented which enables neuroscientists to compose multi-FPGA systems for a cortical object classification model. This is demonstrated by mapping this algorithm onto two distinct platforms providing speedups of up to ~28X over a reference CPU implementation.