Executing Model Checking Counterexamples in Simulink

  • Authors:
  • Jiri Barnat;Lubos Brim;Jan Beran;Tomas Kratochvila;Ítalo R. Oliveira

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • TASE '12 Proceedings of the 2012 Sixth International Symposium on Theoretical Aspects of Software Engineering
  • Year:
  • 2012

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Abstract

Verification of embedded systems has become increasingly important in many industrial domains. Safety critical embedded systems, such as those developed in aerospace industry, are regularly subject to automated formal verification process. In this paper we extend our tool integration chain of parallel, explicit-state LTL model checker DIVINE and Matlab Simulink tool suit with an improved support of counterexample simulation. In particular, we show how to provide the verification engineer with a direct connection between the error discovered by the model checker and the simulation in Matlab Simulink. This work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST).