Harnessing parallelism in FPGAs using the hume language

  • Authors:
  • Jocelyn Sérot;Greg Michaelson

  • Affiliations:
  • University of Blaise Pascal, Clermont-Ferrand, France;Heriot-Watt University, Edinburgh, Scotland, UK

  • Venue:
  • Proceedings of the 1st ACM SIGPLAN workshop on Functional high-performance computing
  • Year:
  • 2012

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Abstract

We propose to use Hume, a general purpose, functionally inspired, programming language, initially oriented to resource-aware embedded applications, to implement fine-grain parallel applications on FPGAs. We show that the Hume description of programs as a set of asynchronous boxes connected by wires has a very natural interpretation in terms of register-transfer level hardware description, hence leading to efficient implementations on FPGAs. The paper describes the basic compilation process from a subset of Hume to synthetisable RTL VHDL and show preliminary experimental results obtained with a very simple perceptron application.