Many-thread aware instruction-level parallelism: architecting shader cores for GPU computing

• Authors:

• Ping Xiang;Yi Yang;Mike Mantor;Norm Rubin;Huiyang Zhou

• Affiliations:

• NCSU, Raleigh, NC, USA;NCSU, Raleigh, NC, USA;AMD Inc., Orlando, FL, USA;AMD Inc., Boston, MA, USA;North Carolina State University, Raleigh, NC, USA

• Venue:
• Proceedings of the 21st international conference on Parallel architectures and compilation techniques
• Year:
• 2012