Theoretical Computer Science
A stubborn attack on state explosion
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
A partial approach to model checking
Papers presented at the IEEE symposium on Logic in computer science
Information and Computation
Stubborn set methods for process algebras
POMIV '96 Proceedings of the DIMACS workshop on Partial order methods in verification
Invariants and Paradigms of Concurrency Theory
PARLE '91 Proceedings of Parallel Architectures and Languages - Volume II
Unfolding and Finite Prefix for Nets with Read Arcs
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Invariant Semantics of Nets with Inhibitor Arcs
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
Partial-Order Methods for Temporal Verification
CONCUR '93 Proceedings of the 4th International Conference on Concurrency Theory
A Linear Local Model Checking Algorithm for CTL
CONCUR '93 Proceedings of the 4th International Conference on Concurrency Theory
Lectures on Petri Nets I: Basic Models, Advances in Petri Nets, the volumes are based on the Advanced Course on Petri Nets
A General Approach to Partial Order Reductions in Symbolic Verification (Extended Abstract)
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
All from One, One for All: on Model Checking Using Representatives
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
A partial order approach to branching time logic model checking
ISTCS '95 Proceedings of the 3rd Israel Symposium on the Theory of Computing Systems (ISTCS'95)
Clusters, Confusion and Unfoldings
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2000)
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Signal-event nets provide a modular modeling technique based on Petri nets. Actions of a module can be activated or can be prevented by another module through condition arcs. One-sided synchronization of modules is done by signal-events, which cause the execution of actions in steps. But due to condition arcs and signal-events simultaneous firing of steps may lead to markings, which are not reachable by conventional sequential interleaving. We give a criterion, in which situations simultaneous firing of steps can be safely omitted, without missing reachable markings.