Exploiting task temperature profiling in temperature-aware task scheduling for computational clusters

  • Authors:
  • Daniel C. Vanderster;Amirali Baniasadi;Nikitas J. Dimopoulos

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada;Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada;Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada

  • Venue:
  • ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture
  • Year:
  • 2007

Quantified Score

Hi-index 0.00

Visualization

Abstract

Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary challenge for continued scaling and long-term processor reliability. While solutions for low-power and low-temperature circuits and microarchitectures have been studied for many years, temperature-awareness at the computational cluster level is a relatively new problem. To address this problem, we introduce a temperature-aware task scheduler based on task temperature profiling. We study the task characteristics and temperature profiles for a subset of SPEC'2K benchmarks. We exploit these profiles and suggest several scheduling algorithms aimed at achieving lower cluster temperature. Our findings show a clear trade-off between the overall queue servicing time and the cluster peak temperature. Whether the temperature reductions achieved are worth the extra delay is left to the designer/user to decide based on the case by case performance restrictions and temperature limitations.