Parallelization of Pollard's Rho Integer factorization algorithm

  • Authors:
  • G. Harish;G. Punith Kumar;Anjan K. Koundinya;Y. V. Pramod;N. K. Srinath;G. E. Raghavendra Kumar;R. Sandeep;Archit Shukla;Madan Acharya

  • Affiliations:
  • R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India;R. V. College of Engineering, Bangalore, India

  • Venue:
  • Proceedings of the Second International Conference on Computational Science, Engineering and Information Technology
  • Year:
  • 2012

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Abstract

In the new era of computing technology, demands legacy algorithms to be adaptable to everchanging hardware architecture. With advent of higher processing capablities, the legacy algorithms needs to be re-designed to suit the state-of-art computing methods to yield maximum and effective utilization of resources. One of the critcial legacy algorithms employed in crypto-systems is the Discrete Logarithm Problem (DLP), which requires computation of integer factor for given large numbers. An efficient way to perform Integer factorization is by employing Pollard's Rho algorithm. This paper focuses on new design and implementation of Pollard's Rho heuristic in a multi-core computing environment.