DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing

  • Authors:
  • Venkatraman Govindaraju;Chen-Han Ho;Tony Nowatzki;Jatin Chhugani;Nadathur Satish;Karthikeyan Sankaralingam;Changkyu Kim

  • Affiliations:
  • University of Wisconsin–Madison;University of Wisconsin–Madison;University of Wisconsin–Madison;Intel;Intel;University of Wisconsin–Madison;Intel

  • Venue:
  • IEEE Micro
  • Year:
  • 2012

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Abstract

The DySER (Dynamically Specializing Execution Resources) architecture supports both functionality specialization and parallelism specialization. By dynamically specializing frequently executing regions and applying parallelism mechanisms, DySER provides efficient functionality and parallelism specialization. It outperforms an out-of-order CPU, Streaming SIMD Extensions (SSE) acceleration, and GPU acceleration while consuming less energy. The full-system field-programmable gate array (FPGA) prototype of DySER integrated into OpenSparc demonstrates a practical implementation.