Model checking railway interlocking systems
ACSC '02 Proceedings of the twenty-fifth Australasian conference on Computer science - Volume 4
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Modelling large railway interlockings and model checking small ones
ACSC '03 Proceedings of the 26th Australasian computer science conference - Volume 16
Instantiating generic charts for railway interlocking systems
Proceedings of the 10th international workshop on Formal methods for industrial critical systems
Tool support for checking railway interlocking designs
SCS '05 Proceedings of the 10th Australian workshop on Safety critical systems and software - Volume 55
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Automated Verification of Signalling Principles in Railway Interlocking Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Model Checking PLC Software Written in Function Block Diagram
ICST '10 Proceedings of the 2010 Third International Conference on Software Testing, Verification and Validation
A state/event-based model-checking approach for the analysis of abstract system properties
Science of Computer Programming
Modelling and verification of relay interlocking systems
Monterey'08 Proceedings of the 15th Monterey conference on Foundations of Computer Software: future Trends and Techniques for Development
Formal methods for intelligent transportation systems
ISoLA'12 Proceedings of the 5th international conference on Leveraging Applications of Formal Methods, Verification and Validation: applications and case studies - Volume Part II
Topologically configurable systems as product families
Proceedings of the 17th International Software Product Line Conference
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Railway interlocking systems represent a challenge for model checkers: although encoding interlocking rules as finite state machines can be quite straightforward, and safety properties to be proved are easily expressible, the inherent complexity related to the high number of variables involved makes the verification of such systems typically incur state space explosion problems. Domain-specific techniques have been adopted to advance the size of interlocking systems that can be successfully proved, but still not reaching the size needed for large deployment cases. We propose a novel approach in which we exploit a distributed modelling of an interlocking system and a careful selection of verification scenarios, so that parallel verifications conducted on multiple processors can address systems of a large size. Some experiments in this direction are presented and new directions of research according to this proposal are discussed.