Dynamic time warping in hardware

  • Authors:
  • Kin Fun Li;James Shueyen Tai

  • Affiliations:
  • University of Victoria, Victoria, BC, Canada;University of Victoria, Victoria, BC, Canada

  • Venue:
  • Proceedings of the 14th International Conference on Information Integration and Web-based Applications & Services
  • Year:
  • 2012

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Abstract

The Dynamic Time Warping (DTW) algorithm is a commonly used algorithm in matching time sequence data in many applications that require some kind of similarity measure. Though effective, DTW is computationally intensive, and therefore is not suitable for real-time situations. In the past 30 years, there has been some research work on implementing DTW in hardware as a stand-alone processing unit, or as a co-processor within a larger system. This work gives a brief survey on previous work done in DTW hardware design and implementation. For many modern-day Web and intelligent applications, one must consider the real time and hardware footprint aspects of the system. A DTW single-element processing unit is proposed in order to investigate the suitability of using it as a building block for more complex architecture for embedded applications. This simple unit is designed and simulated as a Field Programmable Gate Array (FPGA) implementation using Xilinx tools. The performance results of both area and speed show great potential and ascertain DTW hardware is a worthwhile endeavor to pursue further in a systematic fashion.