Similarity Computation Using Reconfigurable Embedded Hardware
DASC '09 Proceedings of the 2009 Eighth IEEE International Conference on Dependable, Autonomic and Secure Computing
Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs
ICDM '10 Proceedings of the 2010 IEEE International Conference on Data Mining
FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications
3PGCIC '11 Proceedings of the 2011 International Conference on P2P, Parallel, Grid, Cloud and Internet Computing
Classifying Sports Gesture Using Event-Based Matching in a Multimedia E-learning System
WAINA '12 Proceedings of the 2012 26th International Conference on Advanced Information Networking and Applications Workshops
A VLSI chip for isolated speech recognition system
IEEE Transactions on Consumer Electronics
IEEE Transactions on Consumer Electronics
Real-Time Classification of Sports Movement Using Adaptive Clustering
CISIS '12 Proceedings of the 2012 Sixth International Conference on Complex, Intelligent, and Software Intensive Systems (CISIS)
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The Dynamic Time Warping (DTW) algorithm is a commonly used algorithm in matching time sequence data in many applications that require some kind of similarity measure. Though effective, DTW is computationally intensive, and therefore is not suitable for real-time situations. In the past 30 years, there has been some research work on implementing DTW in hardware as a stand-alone processing unit, or as a co-processor within a larger system. This work gives a brief survey on previous work done in DTW hardware design and implementation. For many modern-day Web and intelligent applications, one must consider the real time and hardware footprint aspects of the system. A DTW single-element processing unit is proposed in order to investigate the suitability of using it as a building block for more complex architecture for embedded applications. This simple unit is designed and simulated as a Field Programmable Gate Array (FPGA) implementation using Xilinx tools. The performance results of both area and speed show great potential and ascertain DTW hardware is a worthwhile endeavor to pursue further in a systematic fashion.