Stochastic Neural Computation I: Computational Elements
IEEE Transactions on Computers
The synthesis of robust polynomial arithmetic with stochastic logic
Proceedings of the 45th annual Design Automation Conference
The synthesis of combinational logic to generate probabilities
Proceedings of the 2009 International Conference on Computer-Aided Design
Proceedings of the 48th Design Automation Conference
Reliable software for unreliable hardware: embedded code generation aiming at reliability
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Using stochastic computing to implement digital image processing algorithms
ICCD '11 Proceedings of the 2011 IEEE 29th International Conference on Computer Design
High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving trees
Proceedings of the International Conference on Computer-Aided Design
ASAP '11 Proceedings of the ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors
Design of capacity-approaching irregular low-density parity-check codes
IEEE Transactions on Information Theory
A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic
ICCD '12 Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012)
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The paradigm of logical computation on stochastic bit streams has several key advantages compared to deterministic computation based on binary radix, including error-tolerance and low hardware area cost. Prior research has shown that sequential logic operating on stochastic bit streams can compute non-polynomial functions, such as the tanh function, with less energy than conventional implementations. However, the functions that can be computed in this way are quite limited. For example, high order polynomials and non-polynomial functions cannot be computed using prior approaches. This paper proposes a new finite-state machine (FSM) topology for complex arithmetic computation on stochastic bit streams. It describes a general methodology for synthesizing such FSMs. Experimental results show that these FSM-based implementations are more tolerant of soft errors and less costly in terms of the area-time product that conventional implementations.