Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
IMD of closed-loop filterless class D amplifiers
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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The design of a 2.65 W, high-fidelity, filterless Class D audio amplifier in a standard 0.5 μm CMOS technology is proposed in this paper, where an architecture with multiple loop filters is utilized. This structure attenuates residual clock signals around the loop allowing very low total harmonic distortion (THD) and intermodulation distortion to be achieved in conjunction with high power supply rejection ratio (PSRR). The active area of this circuit is about 1.5 脳 1.5 mm2. The THD + N is