Seamless high speed simulation of VHDL components in the context of comprehensive computing systems using the virtual machine Faumachine

  • Authors:
  • Stefan Potyra;Matthias Sand;Volkmar Sieh;Dietmar Fey

  • Affiliations:
  • University of Erlangen-Nuremberg, Erlangen, Germany;University of Erlangen-Nuremberg, Erlangen, Germany;University of Erlangen-Nuremberg, Erlangen, Germany;University of Erlangen-Nuremberg, Erlangen, Germany

  • Venue:
  • Proceedings of the Winter Simulation Conference
  • Year:
  • 2010

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Abstract

Testing the interaction between hard- and software is only possible once prototype implementations of the hardware exist. HDL simulations of hardware models can help to find defects in the hardware design. To predict the behavior of entire software stacks in the environment of a complete system, virtual machines can be used. Combining a virtual machine with HDL-simulation enables to project the interaction between hard- and software implementations, even if no prototype was created yet. Hence it allows for software development to begin at an earlier stage of the manufacturing process and helps to decrease the time to market. In this paper we present the virtual machine FAUmachine that offers high speed emulation. It can co-simulate VHDL components in a transparent manner while still offering good overall performance. As an example application, a PCI sound card was simulated using the presented environment.