An Object-Oriented Time Warp Simulation Kernel
ISCOPE '98 Proceedings of the Second International Symposium on Computing in Object-Oriented Parallel Environments
Parallel Network Simulation under Distributed Genesis
Proceedings of the seventeenth workshop on Parallel and distributed simulation
8.4: SAVANT/TyVIS/WARPED: Components for the Analysis and Simulation of VHDL
IVC-VIUF '98 Proceedings of the International Verilog HDL Conference and VHDL International Users Forum
Specification and Validation of a Real-Time Parallel Kernel Using LOTOS
MASCOTS '01 Proceedings of the Ninth International Symposium in Modeling, Analysis and Simulation of Computer and Telecommunication Systems
Xen and the art of virtualization
SOSP '03 Proceedings of the nineteenth ACM symposium on Operating systems principles
Using ModelSim, Matlab/Simulink and NS for Simulation of Distributed Systems
PARELEC '04 Proceedings of the international conference on Parallel Computing in Electrical Engineering
Proceedings of the 35th conference on Winter simulation: driving innovation
Performance Evaluation - Special issue: Distributed systems performance
Cycle Accurate Memory Modelling: A Case-Study in Validation
MASCOTS '05 Proceedings of the 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
QEMU, a fast and portable dynamic translator
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
Evaluating fault-tolerant system designs using FAUmachine
Proceedings of the 2007 workshop on Engineering fault tolerant systems
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Testing the interaction between hard- and software is only possible once prototype implementations of the hardware exist. HDL simulations of hardware models can help to find defects in the hardware design. To predict the behavior of entire software stacks in the environment of a complete system, virtual machines can be used. Combining a virtual machine with HDL-simulation enables to project the interaction between hard- and software implementations, even if no prototype was created yet. Hence it allows for software development to begin at an earlier stage of the manufacturing process and helps to decrease the time to market. In this paper we present the virtual machine FAUmachine that offers high speed emulation. It can co-simulate VHDL components in a transparent manner while still offering good overall performance. As an example application, a PCI sound card was simulated using the presented environment.