Soft-Decision Error Correction of NAND Flash Memory with a Turbo Product Code

  • Authors:
  • Junhee Cho;Wonyong Sung

  • Affiliations:
  • School of Electrical Engineering, Seoul National University, Seoul, South Korea 151-744;School of Electrical Engineering, Seoul National University, Seoul, South Korea 151-744

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2013

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Abstract

As NAND flash memory fabrication technology scales down to 20 nm and below, the raw bit error rate increases very rapidly and conventional hard-decision based error correction does not provide enough protection. The turbo product code (TPC) based error correction with multi-precision output from NAND flash memory is promising because of high error-correcting performance and flexibility in code construction. In this work, we construct a rate-0.907 (36116, 32768) extended TPC for 2-bit MLC NAND flash memory, and apply the Chase---Pyndiah decoding algorithm. An efficient complexity reduction scheme is also proposed to eliminate redundant computations in the Chase---Pyndiah decoding algorithm. The replica parallel decoding is also employed to lower the error floor. The experimental results that include the effects of flash memory output precision are presented for a simulated flash memory channel.