Instruction Set Extensions for Matrix Decompositions on Software Defined Radio Architectures

  • Authors:

  • Murugappan Senthilvelan;Mihai Sima;Daniel Iancu;Michael Schulte;John Glossner

  • Affiliations:

  • Optimum Semiconductor Technologies, Inc., Tarrytown, USA and Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, USA;Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada;Optimum Semiconductor Technologies, Inc., Tarrytown, USA and Tampere University of Technology, Tampere, Finland 33720;Advanced Micro Devices, Inc., AMD Research, Austin, USA and Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, USA;Optimum Semiconductor Technologies, Inc., Tarrytown, USA and Department of E.E.M.C.S., Delft University of Technology, Delft, The Netherlands

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2013

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Abstract

Emerging wireless applications consistently demand higher data rates. Unfortunately, it is challenging to achieve high data rates within the limited amount of available frequency spectrum. Hence, enhanced spectral efficiency and link reliability within the available frequency spectrum are of the utmost importance in current and next generation wireless protocols. To attain high spectral efficiency and link reliability, wireless protocols employ increasingly complex 2-dimensional techniques that involve computationally-intensive matrix operations. Multiple-Input Multiple-Output (MIMO) communication is an example of a promising technique employed by wireless protocols to deliver higher data rates at the cost of increased algorithmic complexity. Application Specific Integrated Circuits (ASICs) have traditionally been used to implement compute-intensive wireless protocols. The wireless industry has been gradually moving towards an alternative programmable platform called Software Defined Radio (SDR) due to its significant benefits, such as reduced development costs, and accelerated time-to-market. The computationally-intensive matrix operations used in current and next generation wireless protocols are extremely expensive to implement in SDR platforms with conventional Digital Signal Processor (DSP) instruction sets. Hence there is a need for novel instructions, hardware designs and algorithm enhancements to enable higher spectral efficiency on SDR platforms. In this paper, we propose Single Instruction Multiple Data (SIMD) CoOrdinate Rotation DIgital Computer (CORDIC) instruction set extensions with CORDIC hardware support to speedup computationally-intensive matrix decomposition algorithms. The CORDIC instruction set extensions have been implemented on the Sandbridge Sandblaster SB3000 SDR platform and evaluated on conventional algorithms used for decomposing a closed loop 4-by-4 Worldwide Interoperability for Microwave Access (WiMAX) MIMO channel into independent Single-Input Single-Output (SISO) channels. Our experimental results on the closed-loop MIMO channel decomposition using CORDIC instructions demonstrate more than 6x speedup over a Sandblaster baseline implementation that uses state-of-the-art SIMD DSP instructions. The CORDIC instructions also provide similar numerical accuracy when compared to the baseline implementation. The techniques we propose in this paper are also applicable to other SDR and embedded processor architectures.