Ownership passing: efficient distributed memory programming on multi-core systems

  • Authors:

  • Andrew Friedley;Torsten Hoefler;Greg Bronevetsky;Andrew Lumsdaine;Ching-Chen Ma

  • Affiliations:

  • Indiana University, Bloomington, IN, USA;ETH Zurich, Zurich, Switzerland;Lawrence Livermore National Laboratory, Livermore, CA, USA;Indiana University, Bloomington, IN, USA;Rose-Hulman Institute of Technology, Terre Haute, IN, USA

  • Venue:
  • Proceedings of the 18th ACM SIGPLAN symposium on Principles and practice of parallel programming
  • Year:
  • 2013

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Abstract

The number of cores in multi- and many-core high-performance processors is steadily increasing. MPI, the de-facto standard for programming high-performance computing systems offers a distributed memory programming model. MPI's semantics force a copy from one process' send buffer to another process' receive buffer. This makes it difficult to achieve the same performance on modern hardware than shared memory programs which are arguably harder to maintain and debug. We propose generalizing MPI's communication model to include ownership passing, which make it possible to fully leverage the shared memory hardware of multi- and many-core CPUs to stream communicated data concurrently with the receiver's computations on it. The benefits and simplicity of message passing are retained by extending MPI with calls to send (pass) ownership of memory regions, instead of their contents, between processes. Ownership passing is achieved with a hybrid MPI implementation that runs MPI processes as threads and is mostly transparent to the user. We propose an API and a static analysis technique to transform legacy MPI codes automatically and transparently to the programmer, demonstrating that this scheme is easy to use in practice. Using the ownership passing technique, we see up to 51% communication speedups over a standard message passing implementation on state-of-the art multicore systems. Our analysis and interface will lay the groundwork for future development of MPI-aware optimizing compilers and multi-core specific optimizations, which will be key for success in current and next-generation computing platforms.