aItPm: a strategy for integrating IP with ATM

  • Authors:

  • Guru Parulkar;Douglas C. Schmidt;Jonathan S. Turner

  • Affiliations:

  • Department of Computer Science, Washington University, St. Louis, MO;Department of Computer Science, Washington University, St. Louis, MO;Department of Computer Science, Washington University, St. Louis, MO

  • Venue:
  • SIGCOMM '95 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
  • Year:
  • 1995

Quantified Score

Hi-index 0.00

Visualization

Abstract

This paper describes research on new methods and architectures that enable the synergistic combination of IP and ATM technologies. We have designed a highly scalable gigabit IP router based on an ATM core and a set of tightly coupled general-purpose processors. This aItPm (pronounced "IP on ATM" or, if you prefer, "ip-attem") architecture provides flexibility in congestion control, routing, resource management, and packet scheduling.The aItPm architecture is designed to allow experimentation with, and fine tuning of, the protocols and algorithms that are expected to form the core of the next generation IP in the context of a gigabit environment. The underlying multi-CPU embedded system will ensure that there are enough CPU and memory cycles to perform all IP packet processing at gigabit rates. We believe that the aItPm architecture will not only lead to a scalable high-performance gigabit IP router technology, but will also demonstrate that IP and ATM technologies can be mutually supportive.