Memory access pattern protection for resource-constrained devices

  • Authors:
  • Yuto Nakano;Carlos Cid;Shinsaku Kiyomoto;Yutaka Miyake

  • Affiliations:
  • KDDI R&D Laboratories Inc., Fujimino, Saitama, Japan;Information Security Group, Royal Holloway, University of London, Egham, UK;KDDI R&D Laboratories Inc., Fujimino, Saitama, Japan;KDDI R&D Laboratories Inc., Fujimino, Saitama, Japan

  • Venue:
  • CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
  • Year:
  • 2012

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Abstract

We propose a practice-oriented scheme for protecting RAM access pattern. We first consider an instance which relies on the use of a secure (trusted) hardware buffer; it achieves both security and performance levels acceptable in practice by adapting ideas from oblivious RAM mechanisms, yet without the expensive (re-)shuffling of buffers. Another instance requires no special hardware, but as a result leads to a higher, yet practical overhead. One of the main features of the proposal is to maintain the history of memory access to help hiding the access pattern. We claim that under reasonable assumptions, the first scheme with trusted memory is secure with overhead of only 6 ×, as is the second scheme with overhead of (2m+2ℓh+2) × where m and ℓh are respectively the size of the buffer and history. We note that although the proposal is particularly focused on the software execution protection environment, its security may well be appropriate for most uses in the remote storage environment, to prevent access pattern leakage of cloud storage with much lower performance overhead than existing solutions.