Exploiting reuse information to reduce refresh energy in on-chip eDRAM caches

  • Authors:
  • Alejandro Valero;Julio Sahuquillo;Salvador Petit;José Duato

  • Affiliations:
  • Universitat Politècnica de València, Valencia, Spain;Universitat Politècnica de València, Valencia, Spain;Universitat Politècnica de València, Valencia, Spain;Universitat Politècnica de València, Valencia, Spain

  • Venue:
  • Proceedings of the 27th international ACM conference on International conference on supercomputing
  • Year:
  • 2013

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Abstract

This work introduces a novel refresh mechanism that leverages reuse information to decide which blocks should be refreshed in an energy-aware eDRAM last-level cache. Experimental results show that, compared to a conventional eDRAM cache, the energy-aware approach achieves refresh energy savings up to 71%, while the reduction on the overall dynamic energy is by 65% with negligible performance losses.