User-level threads on a general hardware interface

  • Authors:
  • K. R. Mayes;S. Quick;B. C. Warboys

  • Affiliations:
  • Centre for Novel Computing, Department of Computer Science, University of Manchester, Oxford Road, Manchester, UK;Centre for Novel Computing, Department of Computer Science, University of Manchester, Oxford Road, Manchester, UK;Centre for Novel Computing, Department of Computer Science, University of Manchester, Oxford Road, Manchester, UK

  • Venue:
  • ACM SIGOPS Operating Systems Review
  • Year:
  • 1995

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Abstract

Moving resource management out of the operating system kernel facilitates a high degree of customisation. The lowest layer of the Arena system provides an abstract interface to conventional processor hardware (Mayes, 1993; Quick, 1995). The idea is to encapsulate the hardware behind an interface with certain low-level concepts which are generally applicable to any processor. Localization of hardware-dependency has the effect of increasing modularity and thus portability. This encapsulation, termed the Arena hardware object (HWO) supports portable user-level customizable resource management (Mayes et al., 1994). The aim is to remove resource management policy from the HWO whilst maintaining its integrity. The present paper deals with the Arena approach to the provision of pure user-level threads. Native implementations on Sparc and i486 processors are briefly described and performance figures are given. The compromise between reducing policy and maintaining integrity in the HWO implementations is discussed.