Spatial estimation of wafer measurement parameters using Gaussian process models

  • Authors:
  • John Carulli;Ke Huang;Yiorgos Makris;Nathan Kupp

  • Affiliations:
  • Texas Instruments Inc., 12500 TI Boulevard, MS 8741, Dallas, TX 75243;Department of Electrical Engineering, The University of Texas at Dallas, Richardson, TX 75080;Department of Electrical Engineering, The University of Texas at Dallas, Richardson, TX 75080;Department of Electrical Engineering, Yale University, New Haven, CT 06511

  • Venue:
  • ITC '12 Proceedings of the 2012 IEEE International Test Conference (ITC)
  • Year:
  • 2012

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Abstract

In the course of semiconductor manufacturing, various e-test measurements (also known as inline or kerf measurements) are collected to monitor the health-of-line and to make wafer scrap decisions preceding final test. These measurements are typically sampled spatially across the surface of the wafer from between-die scribe line sites, and include a variety of measurements that characterize the wafer's position in the process distribution. However, these measurements are often only used for wafer-level characterization by process and test teams, as the sampling can be quite sparse across the surface of the wafer. In this work, we introduce a novel methodology for extrapolating sparsely sampled e-test measurements to every die location on a wafer using Gaussian process models. Moreover, we introduce radial variation modeling to address variation along the wafer center-to-edge radius. The proposed methodology permits process and test engineers to examine e-test measurement outcomes at the die level, and makes no assumptions about wafer-to-wafer similarity or stationarity of process statistics over time. Using high volume manufacturing (HVM) data from industry, we demonstrate highly accurate cross-wafer spatial predictions of e-test measurements on more than 8,000 wafers.