Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Rapid identification of architectural bottlenecks via precise event counting
Proceedings of the 38th annual international symposium on Computer architecture
Abstraction and microarchitecture scaling in early-stage power modeling
HPCA '11 Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture
Practical performance prediction under Dynamic Voltage Frequency Scaling
IGCC '11 Proceedings of the 2011 International Green Computing Conference and Workshops
Complete System Power Estimation Using Processor Performance Events
IEEE Transactions on Computers
The IBM Blue Gene/Q Compute Chip
IEEE Micro
IBM System Blue Gene Solution: Blue Gene/Q System Administration
IBM System Blue Gene Solution: Blue Gene/Q System Administration
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In order to understand application-level power/performance tradeoffs on current computer systems, runtime monitoring capabilities are needed. Specifically, very fine-grained monitoring capabilities are needed to gain detailed insights on power and performance behavior. Performing fine-grained application-level characterizations not only helps fine-tune application code, but it also increases the chances to detect optimization opportunities for improving next-generation systems. In this paper, we describe a new experimental technique to perform automatic fine-grained power and performance characterization of applications on the IBM Blue Gene®/Q platform. We use it to perform high-resolution measurements and attendant characterizations of key benchmarks for high-performance computing systems: the Tier-1 Sequoia suite and Linpack. The characterization shows that these benchmarks exhibit large time periods in which the memory and network resources are underutilized. We quantify these periods to predict the performance gains of shifting power from the underutilized resources (the network and the memory) to the processor. We explore potential improvements in energy efficiency if power-saving and shifting mechanisms are implemented in future generation systems.