Simple but effective techniques for NUMA memory management
SOSP '89 Proceedings of the twelfth ACM symposium on Operating systems principles
Scaling the bandwidth wall: challenges in and avenues for CMP scaling
Proceedings of the 36th annual international symposium on Computer architecture
The 48-core SCC Processor: the Programmer's View
Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis
A NUCA Substrate for Flexible CMP Cache Sharing
IEEE Transactions on Parallel and Distributed Systems
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Current processor trends show an increasing number of cores and a diversity of characteristics among them. Such processors offer a large potential for achieving high performance for different applications. Nevertheless, exploiting the characteristics of such processors is a challenge. In particular, considering all cores to be the same for scheduling tasks is not valid any longer. In this work we address three important characteristics for future many-core processors: (1) a many-core processor will include groups of different cores, (2) the latency to access off-chip memory will be larger for cores further from the on-chip memory controller and (3) as the number of cores per memory controller increases so does the pressure regarding the off-chip access bandwidth. To address these issues we propose a task assignment policy that monitors the demands of the application task and accordingly assigns the task to a better matching core if available. The assignment policy triggers, if needed, task migration in order to optimize both the execution time and the power consumption. In this paper we describe the assignment algorithm and how we will implement it on a many-core system.